This invention concerns the field of charge coupled device (CCD) transversal filters.
Charge coupling is the collective transfer, by the external manipulation of voltages, of all the mobile electric charge stored within a semiconductor storage element to a similar, adjacent storage element. Majority carriers (or their absence) may be stored in a spatially defined depletion region (a potential well) at the surface of a homogeneous semiconductor. A potential well is a localized volume in the semiconductor substrate which, because it is the most positive location, is attractive to a negative electrons. Charge coupling is particularly useful in processing signal information because the amount of electrical charge which is contained in each charge packet can be used to represent information.
Packets of electrical charge move through a CCD as a result of a continuous lateral displacement of the local potential wells. A potential well is moved by applying a periodic waveform, called the clock voltage, to electrodes on the CCD. Under the influence of the clock voltage, some of the electrons in the vicinity of each electrode form a discrete packet of charge and move from one charge coupled element, or unit cell, to the next cell for each full clock cycle.
A CCD array is well suited as a time sample analog shift register, i.e., a delay line in which the time delay is proportional to the readin/readout rate. CCDs are inherently analog and thus can readily perform sampled data filtering functions in the analog domain. Furthermore, the analog nature of the CCD makes it possible to store more than one data bit in each memory cell and affords a CCD an inherently large dynamic range.
Any signal processing task involving the linear transformation of analog signals, such as correlation, discrete Fourier transforms, filter banks, matched filtering, multiplexing/demultiplexing, array scanning, orthogonal scan transformations, time base translations, etc., can be realized with CCDs. In sampled data filtering functions, for example, data is sampled at a certain frequency and the samples are operated on to produce a desired output. In this application, a CCD is advantageous over more conventional delay lines because of its wide dynamic range and because the propagation velocity and the delay time can be separately controlled. Sampled data filtering has typically been done in the prior art by fabricating a delay line with interim taps at which the signal is sensed and fed back to earlier stages to affect the transmission of the data. Such a structure can be conveniently configured as a bandpass filter where the resonant frequency of the circuit is a direct function of the clock frequency.
Analog-to-digital conversion is expensive and complicated when a large dynamic range (8 or more bits) is required in conjunction with a large bandwidth (5 MHz or more). By using a CCD, sampled data filtering can be performed in the analog domain, thereby eliminating the need for an analog-to-digital conversion and simplifying the associated electronics. The control of the CCD by a master clock also permits a high degree of synchronization and stability. Furthermore, the time delays involved are insensitive to temperature and component drift. All these factors support the choice of an analog CCD implementation over digital approaches to signal processing.
In a serial in/parallel out filtering function, independent, nondestructive low impedance voltage readouts of analog signals are accomplished at specified locations or taps along the CCD, corresponding to various delays through the CCD shift register. The signal voltage which is measured at each tap may be multiplicatively weighted by conductance to give a current proportional to the product of the signal voltage and the weighting conductance. The summation of these product currents can then provide such functions as transversal filtering, correlation, or sampled data smoothing. A two dimensional weighting matrix driven by independent low impedance taps can be used for discrete Fourier transformers, filter banks, or multiple cross correlators. Electrically reprogrammable analog weights combined with these building blocks can be used in adaptive filtering for communications applications. The use of programmable conductances, such as with nonvolatile MNOS or conventional MOS devices, permits such applications as an adaptive transversal line equalizer or a programmable matched filter. Such matched filters are used in wide spectrum communications systems and in radar to detect weak signals in high noise backgrounds.
In such a transversal CCD filter, each delay stage in the CCD represents one clock period of CCD delay. The input signal is nondestructively sampled at each stage, multiplied by weighting coefficients, and the products are summed. The resulting output is in the form of a sampled data convolution of the input signal with the filter coefficients.
The transversal CCD filters which are known in the art have typically been implemented with a split electrode, which is either a driven electrode or a floating electrode extending across the width of the CCD. A split electrode provides weighting by dividing up the current due to charge passing beneath the electrode. The split electrode technique, however, has been implemented in silicon technology and at frequencies much lower than 25 MHz. With the advent of faster semiconductor technologies, such as III-V GaAs devices, a need has developed for a new transversal filter CCD architecture which will operate with improved accuracy and additional immunity to noise.